1. Field of the Invention
The present invention relates to a multi-layer board having a decoupling function, applied to a Ball Grid Array (BGA) type package and, more particularly, to a multi-layer board having a decoupling function using a Multilayer Chip Capacitor (MLCC) and a thin film capacitor to achieve excellent decoupling characteristics in a low frequency band as well as in a radio frequency band.
2. Description of the Related Art
Recently, with higher operating frequency and lower operating voltage in a digital Integrated Circuit (IC) chip, there have been increasing needs for a low impedance decoupling capacitor for more stable supply of power and removal of switching noise.
Such a decoupling capacitor can further lower impedance in a closer proximity to the IC chip, and thus there have been many researches on techniques of forming the capacitor on the IC.
Such a decoupling capacitor is explained briefly.
First, in case of using an off-chip capacitor, it is attached to a printed circuit board or an IC package to be used, which however degrades radio frequency characteristics due to parasitic inductance generated by the wiring length connecting the IC chip to the capacitor.
On the other hand, if formed during a process of constructing transistors on a silicon wafer, the decoupling capacitor is formed in most close proximity to the IC chip, which is most ideal. However, it is not efficient to dispose the decoupling capacitor adjacent to the transistors due to the following two reasons. First, the material used as the electrode inside the chip has a high resistance value, hindering fabrication of a capacitor with a Q value of at least 10. Secondly, forming a passive device inside the chip requires a complex manufacturing process and higher manufacturing costs due to increased cost per unit area since the capacitor is placed in a separate location.
For these reasons, the capacitor to be applied to the chip is usually manufactured by forming a dielectric film between the power and the ground by Back-End-Of-the-Line (BEOL).
The capacitor with application of BEOL is required to have a large capacitance value of at least 100 nF/cm2, and requires low temperature deposition at a temperature of up to 450° C. to prevent oxidation of Cu constituting the wires and maintain the stability of the organic material for substrate constituting the insulation layers.
In general, a system is required to adapt from analog to digital and from low speed, current and voltage to high speed, current and voltage. Therefore, a passive device or device system that can provide low impedance power in a radio frequency region is in demand.
FIG. 1 illustrates a multi-layer board having an MLCC according to the prior art. As shown, the conventional multi-layer board includes a board body 10 made of a plurality of stacked dielectric layers LY1 to LY4, a power terminal unit T1 with power terminals T1a and T1b formed on upper and lower surfaces 10-T and 10-B of the board body 10 and a ground terminal unit T2 with ground terminals T2a and T2b formed on the upper and lower surfaces 10-T and 10-B of the board body 10. The upper and lower power terminals T1a and T1b are connected to each other through a power via VH1 and the upper and lower ground terminals T2a and T2b are connected to each other through a ground via VH2.
At this time, an IC component 20 is mounted on the upper surface 10-T of the board body 10 and connected to the upper power terminal T1a and the upper ground terminal T2a through ground and power solder balls BG and BP.
In this multi-layer board, a first power line LP1 formed on the upper surface 10-T of the board body 10 includes a first connection line LP1a connecting a power terminal connected to, the power solder ball BP with the upper power terminal connected to the power via VH1 and a second connection line LP1b connecting the upper power terminal with a device-mounting power terminal PT.
In addition, a second power line LP2 formed inside the board body 10 is connected to the power terminal unit T1 through the power via VH1.
In addition, a first ground line LG1 formed on the upper surface 10-T of the board body 10 includes a first connection line LG1a connecting a ground terminal connected to the ground solder ball BG and the upper ground terminal connected to the ground via VH2, and a second connection line LG1b connecting the upper ground terminal and a device-mounting ground terminal GT. In addition, the second ground line LG2 formed inside the board body 10 is connected to the ground terminal unit T2 through the ground via VH2.
In this multi-layer board, at least one MLCC 11 is mounted on the upper surface 10-T of the board body 10, and the MLCC 11 is connected between the device-mounting power terminal PT and the device-mounting ground terminal GT, providing decoupling capacitance between the power line and the ground line.
An equivalent decoupling circuit of such a conventional multi-layer board is as shown in FIG. 2.
FIG. 2 is a circuit diagram illustrating equivalent decoupling capacitance between the power line and the ground line. Referring to FIGS. 1 and 2, the equivalent decoupling capacitance circuit between the power line and the ground line is an equivalent circuit of the MLCC and a line connected to the MLCC, in which the ground line can be expressed by inductance L1, capacitance C1 and resistance R1 connected in series.
Such a conventional multi-layer board uses the MLCC 11 to provide decoupling characteristics. However, using the MLCC 11 allows low impedance and effective decoupling characteristics in a low frequency band but does not allow sufficiently low impedance and rather mediocre decoupling characteristics in a radio frequency band.
Furthermore, the conventional multi-layer board has a long physical line connecting the MLCC with the power line and the ground, thus vulnerable to noise and hindering accurate decoupling capacitance.